PCB basics

Trace width & current

A copper trace is a wire with limits — width plus copper weight sets how much current it can carry before it heats up.

Copper traces have real resistance, roughly 17 nΩ·m at room temperature. A skinny 6 mil (0.15 mm) trace at 1 oz copper weight carries about 1 A before its temperature rise passes 10 °C. Double the width and you double the current capacity for the same temperature rise.

The industry reference is IPC-2221 (and its follow-up IPC-2152), which gives current-vs-width curves for internal and external traces at different temperature rises. For hobby work you almost never need to look up the curve — the rules of thumb below cover 95 % of situations.

Two subtleties that trip beginners up: copper weight matters. Cheap fab default is 1 oz (35 µm thick); if you order 2 oz you get double the cross-section for free. And length matters for voltage drop, not for heating — a 200 mm long 6 mil trace still handles 1 A, but you might drop 100 mV across it.

Ground planes & return paths

Every current that flows out of a chip has to come back — the shape of that return path decides how noisy your board is.

Kirchhoff's current law says every electron leaving a pin has to come back somewhere. On a two-layer board with a solid ground plane on the bottom, high-frequency return currents naturally hug directly beneath their signal traces — nature picks the smallest-loop path because it has the lowest inductance.

That is why an unbroken ground plane is one of the single biggest reliability improvements you can make. Cut it into islands with a big slot, or run a signal trace across a break in the ground, and the return current is forced to detour — the loop area explodes, and so does the electromagnetic noise the loop radiates.

For very slow signals (DC, low-audio) the return follows the path of least resistance instead — usually a straight line. That is why a scope probe with a long ground-clip lead shows so much extra ringing: the return-current loop got orders of magnitude bigger the moment you added six inches of ground wire.

Decoupling caps — where they really go

A decoupling cap next to the power connector helps nobody — it has to sit within a few millimetres of the pin it protects.

Digital chips draw current in sharp bursts every clock edge. Each burst wants electrons *now*, and 'now' on a modern MCU is faster than the main power supply's regulator can react. The decoupling cap is a fast local top-up — it sits right next to the chip, hands over a few nanocoulombs on demand, and gets refilled between edges by the slow main supply.

The catch: every millimetre of trace between the cap and the pin adds parasitic inductance. Even a millimetre or two shows up at gigahertz edge rates. The cap works electrically, but the fast burst never reaches the pin — it gets held back by the loop inductance.

The rule that beats every other trick: cap on the same layer as the chip, close to the power pin, ground return going straight down through a stitching via into the plane. Anything else is a compromise. On BGAs where you cannot get close on top, put the cap directly on the back side under the pin.

Vias — the plated hole

A via is a plated copper barrel that lets a trace jump between layers — cheap, useful, and quietly the source of half your signal-integrity problems.

Physically a via is a drilled hole through the fibreglass core with copper electroplated on the inside wall. Standard hobby fab drills a 0.3 mm hole and pads it out to 0.6 mm on each side — small enough to route around, big enough to reliably plate.

Electrically each via adds parasitic inductance (typically 1–2 nH for a 1.6 mm board) and a bit of capacitance to the plane it passes through. For DC and audio you can ignore both. For a fast clock edge, that inductance is a genuine bump in the signal path — every via costs you a bit of bandwidth.

Vias also carry heat and current. A single 0.3 mm via handles about 1 A of continuous current safely; for higher currents, use two or three in parallel. Under a hot power chip, a grid of thermal vias down to the bottom copper is the cheapest and most effective heatsink you can specify.

Silkscreen conventions

The white ink is for the person who will one day try to fix your board — spend the extra minute making it useful.

Silkscreen is a thin ink layer printed on top of the copper and soldermask. It has zero electrical function — its whole job is to help humans read the board. Standard fab default is white ink on green mask, but any legible contrast works.

Three things belong on silkscreen: reference designators (R1, C4, U2), polarity markers, and connector pinouts. Reference designators go outside the part, oriented so the whole board reads in one direction. Polarity markers — a stripe for diodes, a dot or square pad for pin 1 of an IC, a plus sign for an electrolytic — save you from soldering a $30 chip in backwards.

The minimum readable line width most fabs support is 6 mil (0.15 mm). Text under 40 mil (1 mm) tall is rarely legible with parts populated. And anything printed under a component is invisible the moment that component is placed — always print reference designators *next to* the part outline, never underneath it.

DRC — the checks that save you money

Design Rule Check is the fab's minimum standard, encoded as a script. Passing DRC is the difference between a working board and a very expensive coaster.

Every PCB house publishes a capabilities sheet: minimum trace width they can etch, minimum spacing they can hold, smallest drill they can plate, smallest pad they can print. Design Rule Check reads those numbers out of a rules file and compares every geometric feature of your board to them.

Most CAD tools ship with generous defaults — often stricter than what a fab can hold — because a design that passes those defaults will pass at essentially any low-cost prototype fab. Common checks: trace width, clearance between copper features, annular ring (the copper collar around a drill), soldermask sliver width, and silkscreen-over-pad.

DRC does not check that your circuit works. It also does not check that a wire connects to the pin you meant, which is the electrical rules check (ERC). Run both. Then, before you order boards, run a manual visual sweep at 200 % zoom: every net, every pad, every via.

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