Atomic Layer Deposition (ALD) Reactor

A vacuum chamber that grows films one atomic layer at a time — and stops, no matter how long you wait, until you let the next layer begin. Conformal coatings inside a hole 1 µm wide and 200 µm deep come out exactly as thick at the top as at the bottom.

Deposits high-quality thin films of metal oxides (Al₂O₃, HfO₂, ZrO₂, TiO₂), nitrides (TiN, TaN), pure metals (W, Pt, Cu by selective ALD), and complex layered stacks at temperatures typically between 80 °C and 350 °C. The defining feature is conformality: a 10 nm Al₂O₃ ALD film coats a 200:1 aspect-ratio hole in a silicon DRAM capacitor stack with thickness uniform to better than 2% from top to bottom. ALD is the only practical technique for the high-k gate dielectric in every transistor below the 45 nm node, for the dielectric of every 1z-nm DRAM cell, and for the encapsulation layers that keep flexible OLED displays from oxidising.

The substrate sits inside a hot-wall reactor at ~50 mbar. One ALD 'cycle' has four steps: (1) Precursor pulse — a vapour of, say, trimethylaluminium (TMA, Al(CH₃)₃) flows over the substrate; surface hydroxyl groups react with the TMA, releasing CH₄ and leaving an Al–CH₃ terminated monolayer. The reaction self-terminates because the surface is now saturated. (2) Inert-gas purge with N₂ or Ar to remove unreacted precursor. (3) Co-reactant pulse — water vapour flows in and reacts with the surface CH₃ groups, releasing more CH₄ and leaving a fresh Al–OH surface, ready for the next TMA pulse. (4) Second purge. Each complete cycle adds approximately 0.1 nm of Al₂O₃. Total film thickness is simply (cycle count) × (growth per cycle), repeatable to ±1% across a 300 mm wafer. Because both reactions are self-limiting, the film thickness is independent of how long each pulse lasts beyond the saturation threshold — gas flow uniformity is not the precision-determining factor it is in CVD or sputtering. ALD throughput is intrinsically low (~1 wafer per hour for a 30 nm film in a single-wafer tool), so production fabs use batch reactors handling 100+ wafers simultaneously or spatial ALD reactors where the substrate moves between precursor zones.

In plain terms

Imagine painting a wall with a special paint that sticks only one layer thick. No matter how long you brush, you cannot make it thicker — every brushstroke either lands on bare wall (and sticks) or lands on already-painted wall (and does nothing). To make a thicker coating you wash the brush, pick up a second colour that only sticks on top of the first, brush again, then back to the original. By alternating you can grow a paint film perfectly even on a sponge, inside every tiny hole, with the layer count exactly equal to how many times you brushed.

Also called: ALD chamber, atomic-layer deposition tool, self-limiting CVD, ALE precursor reactor.

Why it matters

Every modern CMOS transistor below the 45 nm node uses an ALD-deposited high-k gate dielectric — typically HfO₂ ~1.5–2 nm thick — replacing the thermal SiO₂ that scaled CMOS for 40 years. Without ALD, the iPhone, the data centre, and the present semiconductor industry would not exist.
Suntola's original 1977 patent for atomic layer epitaxy (the predecessor name for ALD) lay almost unused for 20 years until the high-k crisis at the 90 nm node made it the only viable solution. The technology won Suntola the 2018 Millennium Technology Prize.
ALD is genuinely conformal in a way no other deposition technique is — the film grows by sequential surface saturation, so anywhere the gas can diffuse, the film deposits uniformly. This makes it the only method capable of coating ultra-high-aspect-ratio nanostructures: 60:1 DRAM trenches, 3D NAND vertical channels (>100 layers), MEMS sensor cavities, and porous catalyst supports.
Beyond microelectronics, ALD is now used to encapsulate flexible OLED displays (Samsung Galaxy Flip/Fold), to coat polymer-electrolyte fuel-cell catalysts, and to engineer the interfacial layers in lithium-ion battery cathodes — all applications where 1-nm-precise coating of complex topographies is non-negotiable.

Where it lives

ASM A412 PLUS — single-wafer thermal ALD reactor, foundry-installed at TSMC, Samsung, Intel for HfO₂ gate dielectric (200/300 mm)
Lam Research VECTOR® ALD — batch and single-wafer ALD platforms for 3D NAND and DRAM volume production
Applied Materials Endura® Olympia™ — ALD tool used for TiN and TaN metal-gate workfunction layers
Picosun R-200 / R-300 / X4 — flexible R&D and small-production ALD tools used in university labs and pilot lines worldwide
Beneq Roll-to-Roll Spatial ALD — large-area ALD for flexible electronics, solar cell passivation, and OLED encapsulation

Key numbers

Growth per cycle (typical): 0.05–0.15 nm/cycle (Effectively one atomic layer per cycle for most oxide chemistries)
Process temperature window: 80–350 °C (thermal ALD); <100 °C (plasma-enhanced ALD) (Above this window precursors decompose; below, reaction is incomplete)
Conformality (aspect ratio limit): >200:1 (Single-cycle conformality measured down to 60:1 in DRAM trenches)
Pinhole density (10 nm Al₂O₃): <1 per cm² (Why ALD is used for OLED encapsulation)
Throughput (single-wafer thermal): ~1 µm/hour film thickness equivalent (Batch and spatial ALD raise effective throughput 10–100×)
TMA + H₂O cycle time (production): 1–5 seconds per cycle (Dominated by purge times to remove unreacted precursor)
Year of first ALE patent (Suntola): 1974 (FI patent); 1977 grant (Originally for ZnS thin films for electroluminescent displays)

Surprising facts

Tuomo Suntola filed the original patent for atomic layer epitaxy in 1974 (granted 1977, FI 52523), more than 25 years before the technology was adopted in volume semiconductor production. The patent expired before the technology became commercially essential.
An ALD film grows about 0.1 nm per cycle — roughly one atomic layer. To grow a 100 nm coating requires 1000 cycles; in a typical single-wafer reactor at ~5 seconds per cycle, that is over an hour for a single wafer. The semiconductor industry compensates by running 100-wafer batch reactors or by inventing spatial ALD where the substrate translates between precursor zones at sub-second speed.
Modern 3D NAND flash memory contains vertical channels >100 atomic layers tall and only a few nanometres wide, all coated by ALD with the SiO₂/Si₃N₄ tunnel-dielectric stack uniform to within a single atom thickness from top to bottom — a feat impossible with any other deposition technique.
Trimethylaluminium (TMA), the most widely used ALD precursor, ignites spontaneously on contact with air. Industrial ALD tools deliver microgram quantities per pulse through heated stainless-steel manifolds under inert overpressure; a leak the size of a pinhole would burn for hours.

Open questions

Substrate-inhibited and substrate-enhanced growth in early cycles: Many ALD chemistries do not reach their steady-state growth-per-cycle until 5–50 cycles have elapsed. On hydrophobic substrates (silicon with native oxide stripped), Al₂O₃ ALD may show essentially zero growth for the first 10 cycles ('nucleation delay'), then jump to ~0.1 nm/cycle. On hydroxyl-rich substrates the first cycles can over-grow, producing thickness anomalies that interfere with sub-1-nm targeted films. The microscopic origin — surface-site density, precursor adsorption kinetics, defect chemistry — is well-studied but no first-principles model reliably predicts the nucleation transient for a new substrate–chemistry pair.

A short history

Atomic Layer Epitaxy (ALE) was invented by Tuomo Suntola at the Instrumentarium Oy laboratory in Finland in 1974, motivated by the need for pinhole-free thin films of zinc sulphide for the electroluminescent flat-panel displays his company was developing. The technique remained a Finnish niche through the 1980s, finding intermittent use in II–VI semiconductor research and in display manufacture by Lohja Corp and later Planar Systems. Independent reinvention in the Soviet Union (1960s, V. B. Aleskovsky, S. I. Koltsov — the 'molecular layering' tradition) ran in parallel for decades. ALD remained an academic curiosity until the late 1990s, when CMOS gate-oxide scaling crashed into a fundamental physics limit: SiO₂ thinner than ~1.5 nm leaked too much current to be useful. The industry's solution was to switch to a high-permittivity (high-k) dielectric, and ALD was the only deposition method that could grow HfO₂ uniformly at 1.5 nm thickness with the required quality. Intel introduced HfO₂/metal-gate transistors at the 45 nm node in 2007, transforming ALD overnight from a laboratory tool to a mainstream production technology. Suntola received the Millennium Technology Prize in 2018 — the first time the prize was awarded for a materials-deposition technique.

Sources

Suntola, T. — Thin Solid Films 216, 84 (1992): Atomic layer epitaxy (historical review) (https://doi.org/10.1016/0040-6090(92)90874-B)
George, S.M. — Chem. Rev. 110, 111 (2010): Atomic layer deposition: an overview (https://doi.org/10.1021/cr900056b)
Technology Academy Finland — 2018 Millennium Technology Prize citation (Tuomo Suntola) (https://taf.fi/en/2018-tuomo-suntola/)
Puurunen, R.L. — J. Appl. Phys. 97, 121301 (2005): Surface chemistry of atomic layer deposition (https://doi.org/10.1063/1.1940727)
Intel Corp. — 45 nm High-k + Metal Gate Strategy press release (2007) (https://www.intel.com/pressroom/archive/releases/2007/20070128comp.htm)