P-MOSFET
An enhancement-mode P-channel MOSFET is controlled by gate voltage relative to its source. A sufficiently negative VGS turns it on; bringing gate and source close together turns it off. It can simplify positive-rail high-side switching, but a lower-voltage controller may still need a level-shifting driver.
The gate electric field controls a conducting channel. For switching, select the gate-to-source drive from the device's specified on-resistance conditions, not only its threshold voltage. A driver must charge and discharge the gate and keep VGS within its limits as the source voltage changes.
In plain terms
Same valve as an N-MOSFET, but the polarity is flipped — it's wired between the rail and the load, and pulling the gate down opens it.
Why designers use it
- Can switch a positive rail without the above-source gate voltage required by an N-channel high-side device.
- Can simplify some low-frequency load-switching circuits when losses and gate-drive requirements are acceptable.
- May be used in properly designed reverse-polarity circuits; orientation and the intrinsic body diode matter.
Best for
- High-side switch
- Reverse-polarity guard
Key specifications
- Vds: −12 V – −200 V
- Rds(on): 5 mΩ – 1 Ω (Higher than equivalent n-channel)
- Id continuous: 0.5 A – 80 A
- Vgs(th): −1 V – −4 V
- Qg total gate charge: 5 nC – 100 nC
When not to use it
- Anywhere efficiency matters and an N-channel + high-side gate driver fits — N-channel parts are cheaper and lower-Rds(on).
- On the low side of a load — that's the N-channel's turf; using P-channel there flips the logic and burns budget.
- At very high currents — the same die area gives ~3× the Rds(on) of an equivalent N-channel.
Common mistakes
- Assuming a 3.3 V GPIO can directly turn off a P-channel MOSFET whose source is at 12 V.
- Pulling the gate far below the source without checking the maximum permitted VGS.
- Selecting a part solely by threshold voltage instead of its guaranteed on-resistance at the available drive.
- Leaving the gate floating during reset or power sequencing.
- Ignoring body-diode orientation and current flow when the channel is off.
Where you will find it
- A USB power bank uses a P-MOSFET as its reverse-polarity guard in series with the battery: if the battery is accidentally inserted backwards, the gate-source voltage is the wrong polarity, the FET stays off, and the circuitry is protected — all with a drop of only ~50 mV at normal load.
- A laptop's battery charger path uses a P-MOSFET as a load switch between the adapter and the system rail: the charger IC pulls the FET's gate low to connect the adapter with near-zero voltage drop, replacing a diode that would waste ~0.5 W at 2 A.
- An automotive seat-heater control module uses a P-MOSFET between the 12 V rail and the heater element: the body-control module pulls the gate down to allow current through the resistive mat, with the high-side topology keeping the heating mat's current return on the safe chassis ground.
A short history
The P-channel MOSFET was demonstrated alongside the N-channel type by Atalla and Kahng at Bell Labs in 1959. P-channel (PMOS) devices were actually easier to manufacture than NMOS in early silicon technology and were the first type to reach commercial production (1964). The most significant contribution of PMOS came with the invention of complementary MOS (CMOS) logic by Frank Wanlass and Chih-Tang Sah at Fairchild Semiconductor in 1963, pairing PMOS and NMOS transistors to create logic gates that consume virtually no static power. CMOS became the dominant IC technology from the 1980s onward, and P-channel MOSFETs remain essential in high-side load switches, PMOS LDO regulators, and CMOS analogue circuits.
Good to know
- A gate voltage must always be interpreted relative to the source: a voltage measured only against ground can be misleading.
- A pull-up to the source establishes an off-state tendency, but does not by itself provide safe logic level shifting.