JFET
A junction field-effect transistor controls drain-source current with gate-source voltage. Its reverse-biased gate junction can give a high input impedance, useful in suitable analog circuits. Noise, leakage, current and voltage limits still depend on the device and operating conditions.
In a conventional N-channel JFET, the gate forms a p-n junction with the channel. Increasing reverse gate bias widens the depletion region and reduces channel conduction. With drain voltage applied, the device can operate in a resistive region or a current-saturation region. Drain-end pinch-off associated with saturation is not the same as gate bias reducing the current toward cutoff. P-channel devices use the corresponding opposite polarities.
In plain terms
Imagine a flexible waterway squeezed from the sides. The channel already exists; changing the gate voltage narrows the conducting path. That is different from creating a channel in an enhancement-mode MOSFET.
Why designers use it
- Control an analog current with an input voltage.
- Provide a high-impedance input where the selected device's leakage and noise fit the circuit.
- Use a suitable device in a controlled-resistance or analog-switching application within its permitted signal range.
Best for
- Analog input stages
- Suitable analog switching
- Voltage-controlled current circuits
Key specifications
- Channel and bias: N-channel or P-channel (Use the correct voltage polarities and operating region.)
- IDSS and cutoff voltage: Device-specific test conditions (Do not treat either parameter as a universal constant.)
- Leakage and noise: Bias-, frequency- and temperature-dependent (Use the selected device's relevant curves and limits.)
- Pin assignment: Exact part and package (A familiar three-lead body does not guarantee the same pin order.)
When not to use it
- As a drop-in substitute for a BJT or enhancement-mode MOSFET without redesigning the bias and checking ratings.
- When the chosen part's gate leakage, noise or signal range does not meet the measurement requirement.
- Where the circuit needs an isolation barrier rather than a transistor-controlled conductive path.
Common mistakes
- Assuming the device is off when gate and source are at the same voltage.
- Confusing current saturation with zero-current cutoff.
- Applying an N-channel bias convention to a P-channel device.
- Treating high input impedance as exactly zero gate current.
- Assuming package appearance identifies gate, drain and source pins.
Where you will find it
- InterFET describes using a JFET in its saturation region for amplification, where gate-voltage changes control drain current.
- The same note describes the resistive region and analog switching. These are operating modes, not promises that an arbitrary JFET is suitable for a motor load or a particular sensor.
A short history
InterFET's application note explains the JFET through its existing channel, junction gate and depletion regions. Its characteristic curves distinguish resistive, saturation and breakdown operation. This background explains the mechanism without relying on an unverified invention-priority story or presenting MOSFET-based CPUs as JFET examples.
Good to know
- Normally on describes conduction with zero gate-source bias under appropriate drain bias. It does not mean the transistor is an uncontrolled short circuit.
- A JFET has a junction gate, not the insulated oxide gate of a MOSFET. Similar names do not make their bias rules identical.