XOR Gate
An exclusive-OR gate outputs 1 when its inputs are different and 0 when they're the same — binary addition without the carry. The 74HC86 is the canonical CMOS quad XOR; cascaded XORs build adders, parity generators, and CRC checkers.
Inside the XOR is a small network of NAND or AND-OR gates: at the algebra level, A⊕B = (A·¯B) + (¯A·B). In CMOS standard cells, an XOR is typically built from a transmission-gate multiplexer that selects the input or its complement based on the other input — only 6 transistors instead of the 12 a NAND-based version would need.
In plain terms
Two friends who can never agree on a restaurant: dinner only happens when one wants pizza and the other wants sushi. If both pick the same place, the night collapses.
Why designers use it
- Build the sum bit of a binary half-adder — two XORs and an AND give a full-adder.
- Compute the parity of a multi-bit word by chaining XORs, used in error detection on memory and serial busses.
- Compare two bit-streams to detect differences, the first step of a CRC error check.
- Implement bitwise XOR for cryptographic operations like one-time-pad mixing or stream-cipher whitening.
Best for
- Adders
- Parity generators
- CRC checkers
Key specifications
- Logic family: 74HC, 74LV, 74AUP, 74AHCT
- Supply: 1.65 V – 5.5 V
- Propagation delay: 3 ns – 12 ns
- Drive strength: 4 – 24 mA
When not to use it
- For wide n-bit equality comparison — a dedicated comparator IC like the 74HC85 is faster than chaining n XORs through a NOR.
- For analog signal mixing — XOR is digital and produces noise spectra; a Gilbert-cell mixer is the right RF tool.
Common mistakes
- Using XOR as a 'controlled inverter' without realising the propagation delay shifts when the control input toggles — critical-path timing can change between control states.
- Cascading many XORs for parity without buffering the intermediate nodes, accumulating delay and skew that breaks fast serial-link parity checks.
Where you will find it
- A 3.5-inch floppy disk drive's read channel used a 74HC86 XOR to recover data from MFM-encoded magnetic transitions: the XOR compared the incoming bitstream to a reference clock and recovered the data clock automatically, a fundamentally simpler decoder than the PLLs hard disks needed.
- An Ethernet PHY's parity-error detector chains seven XOR gates across an 8-bit byte: the final XOR's output goes high when the byte has the wrong parity, flagging single-bit errors on a 100Base-TX link before they corrupt a TCP packet.
- A WW2-style one-time-pad encryption demonstrator uses a 74HC86 to combine plaintext bits with a paper-tape pseudo-random key: the XOR output is the ciphertext, and applying the same key again decrypts — the original Vernam cipher implemented in a single 14-pin DIP.
A short history
An XOR gate is a digital logic gate with two inputs that outputs true only when the inputs differ, that is when exactly one input is true; if both inputs match, the output is false. This behavior makes XOR useful for binary addition, producing the sum bit while an AND gate produces the carry, and for generating parity bits in digital data.
Good to know
- XOR is the parity gate — its output is high when an odd number of inputs are high. Every CRC checksum, every parity bit, and every adder's sum bit is XOR-built.
- Two XORs and an AND form a half-adder; cascade and you have a ripple-carry adder; that's how every CPU's ALU is structurally built.
- Cryptography lives on XOR: AES, ChaCha20, and the one-time pad all rely on the property that A ⊕ B ⊕ B = A.