Inverter
A NOT gate — also called an inverter — produces the opposite logic level of its single input. The 74HC04 is six independent inverters in one 14-pin package; the 74AHC1G04 is a single-gate inverter in a 5-pin SC-70 for tight glue-logic spots on a board.
A CMOS inverter is exactly two transistors: one PMOS between Vₒₒ and the output, one NMOS between the output and ground, sharing a single gate input. When the input is low the PMOS conducts and pulls the output high; when the input is high the NMOS conducts and pulls it low. The widths of the two transistors are tuned so rise and fall times match — the foundational CMOS design exercise.
In plain terms
A pair of opposite-pulled curtains rigged to one cord: pull the cord one way and the left curtain opens while the right closes. The inverter's output is always whatever its input isn't.
Why designers use it
- Flip the polarity of an active-low chip-select to the active-high enable of another part.
- Form the second half of a Pierce-style crystal oscillator, where the inverter provides the 180° phase shift the crystal needs to oscillate.
- Buffer a slow signal edge by chaining several CMOS inverters — each inverter sharpens the transition.
- Generate a controlled delay by passing a signal through an even number of inverters with deliberately weak drive.
Best for
- Polarity flip
- Pierce oscillator
- Edge sharpening
Key specifications
- Logic family: 74HC04, 74LV04, 74AUP1G04
- Supply: 1.65 V – 5.5 V
- Propagation delay: 2 ns – 8 ns
- Drive strength: 4 – 24 mA
When not to use it
- When you need significant current drive — a 74HC04 sources only a few mA. Reach for a buffer-driver such as 74HC125 instead.
- For analog signal inversion — an op-amp summing junction with −1 gain is the right tool; the 74HC04's threshold makes it terrible at handling continuous voltages.
Common mistakes
- Using a 74HC04 hex inverter as an analog amplifier in its threshold region — it will work briefly, then oscillate at a few hundred MHz and dissipate enormous current.
- Forgetting to bypass Vₒₒ with a 100 nF capacitor at every IC — inverter chains can pull big spikes from the rail when many gates switch together.
Where you will find it
- A vintage wristwatch's 32.768 kHz crystal oscillator uses a single CMOS inverter biased into linear mode by a 10 MΩ feedback resistor: that one transistor pair plus the quartz crystal between input and output forms the entire timekeeping reference — the textbook Pierce topology that has been clocking quartz watches since the 1970s.
- A FPGA development board uses a 74AHC1G04 single-gate inverter to flip an active-low PROGRAM_B button signal into the active-high RESET expected by a downstream MCU — a 5-pin SC-70 IC saves the cost and software complexity of routing the signal through the FPGA fabric.
- An audio guitar pedal's true-bypass relay driver uses a chain of three 74HC04 inverters to clean up a bouncing footswitch: the cascade re-times the noisy edge to a clean transition that drives the relay coil through a transistor without any chatter or contact bounce reaching the audio path.
A short history
A NOT gate, also called an inverter, produces the logical opposite of its input. A valid HIGH input gives a LOW output, and a valid LOW input gives a HIGH output. This simple operation is a building block for more complex logic functions.
Good to know
- An inverter is the simplest digital gate — a 74HC04 packs six in one DIP-14, and an SC-70-5 single inverter (74LVC1G04) is everywhere in modern microcontroller boards.
- Cascading two inverters builds a buffer; chaining an odd number forms a ring oscillator — a calibration trick still used inside silicon to measure on-die delay variation.
- CMOS inverters dissipate energy only at the moment they switch — the basis of why every modern logic family is CMOS, not bipolar.