Flip-Flop
A flip-flop stores a single binary bit and changes state only on a clock edge, making it the fundamental building block of registers, counters, state machines, and synchronous logic. The D-type flip-flop is the most common: it captures the D input at the clock edge and holds it on the Q output.
Two cross-coupled NAND gates (or NOR gates) form a bistable latch. The clock input gates when the latch can capture new data. In an edge-triggered D flip-flop, a master stage captures D when the clock is low, and a slave stage propagates the captured value to Q on the rising clock edge, making Q change only at that instant.
In plain terms
A light switch with a lock: you can only move it at the moment a clock pulse arrives, then it holds that position rigid until the next pulse — immune to any noise that occurs between pulses.
Why designers use it
- Synchronise asynchronous signals to a clock domain to eliminate metastability.
- Build registers that hold processor state between instruction cycles.
- Divide a clock frequency by two with every flip-flop in a ripple counter.
- Create a debounced switch output by requiring a stable level for N clock cycles before changing.
Best for
- Clock-domain crossing
- State machine
- Counter
Key specifications
- Operating limits: Check the exact manufacturer's datasheet (A family name does not establish voltage, current, temperature or timing limits.)
- Pin assignment: Match the complete part and package code (A similar name or function does not guarantee the same wiring.)
- Mechanical fit: Use the exact package drawing (Check pad layout, dimensions and viewing direction before building.)
When not to use it
- When you need to store more than a few bits — use a register file or SRAM instead.
Common mistakes
- Violating setup/hold time by routing the data signal through too much combinatorial logic before the flip-flop's D input, causing metastability.
- Forgetting asynchronous reset polarity — the /CLR pin on a 74HC74 is active-low, and it's easy to tie it low by mistake.
Where you will find it
- A USB keyboard's HID controller uses a double-synchroniser (two cascaded D flip-flops) for every key switch input: the flip-flops sync the switch's asynchronous bounce to the 12 MHz USB frame clock, preventing metastability from registering ghost key-presses in the HID report.
- An FM radio tuner's PLL frequency divider uses a cascade of toggle flip-flops to divide the VCO frequency down to the reference frequency: each flip-flop halves the frequency, and the chain produces the exact ratio the loop filter needs to lock the VCO to the station.
- A CNC machine's step-pulse output uses a D flip-flop to re-time the step signal to the main FPGA clock: without it, timing jitter from the software control loop would cause the stepper motor to occasionally miss half a step, accumulating position error over a long cutting path.
A short history
British physicists William Eccles and Frank Jordan filed a patent for the 'Eccles-Jordan trigger circuit' on June 21, 1918 (published as British Patent 148,582 in 1920), the first flip-flop—a bistable circuit built from two vacuum tubes whose outputs cross-couple as inputs. Early flip-flops were called 'trigger circuits' or 'multivibrators.' As Claude Shannon demonstrated in 1948, a bistable flip-flop can store one bit of information using Boolean logic. The transistor flip-flop enabled high-speed digital counters and registers, and the D-type and JK flip-flops implemented in TTL (1966) and CMOS (1968) ICs became the foundational storage elements of all sequential digital logic.