Counter
A counter IC increments (or decrements) a binary register on each rising or falling edge of a clock or event signal. It offloads frequency measurement, period measurement, or event counting from a microcontroller, and provides the result as a parallel bus or BCD digit outputs.
A chain of T flip-flops, each toggling at half the frequency of the previous stage, forms a binary ripple counter. Synchronous counters use a carry-lookahead network so all bits update simultaneously, avoiding the glitches in ripple counters. A terminal-count output asserts when the count reaches its maximum, optionally resetting to zero (modulo-N behaviour).
In plain terms
An odometer in silicon: each incoming pulse advances the count by one, and you can read out the total at any moment without the CPU spending cycles polling.
Why designers use it
- Count encoder pulses in a motor controller without interrupting the CPU on every edge.
- Generate precise time bases by dividing a crystal clock down to 1 Hz or 1 kHz.
- Implement address counters in DRAM refresh or memory-mapped I/O.
- Divide RF signals to bring them into range of a microcontroller's timer input.
Best for
- Event counting
- Frequency division
- Timers
Key specifications
- Operating limits: Check the exact manufacturer's datasheet (A family name does not establish voltage, current, temperature or timing limits.)
- Pin assignment: Match the complete part and package code (A similar name or function does not guarantee the same wiring.)
- Mechanical fit: Use the exact package drawing (Check pad layout, dimensions and viewing direction before building.)
When not to use it
- When the count value changes often and you need random access — use an FPGA register or a microcontroller's hardware timer with direct-read.
Common mistakes
- Ignoring ripple-counter glitches and connecting the output directly to decoder logic, causing false decodes during count transitions.
- Forgetting the asynchronous-clear pin's polarity and accidentally holding the counter in reset.
Where you will find it
- A Geiger-Müller radiation monitor uses a 74HC4040 binary counter to accumulate tube pulses over a 10-second gate period: the counter's 12-bit output gives count values up to 4095 without a single CPU interrupt, and the microcontroller reads the latch at the gate's end to compute counts-per-minute.
- A laser rangefinder's time-of-flight circuit uses a fast counter clocked at 1 GHz to count the nanoseconds between the laser pulse and the return echo: the 14-bit count is read by an FPGA after each measurement, converting directly to distance (30 cm per nanosecond).
- A traffic-flow counter at a highway toll booth uses a 74HC161 synchronous counter to count vehicle axles from an inductive loop sensor: the counter overflows every 16 vehicles and generates an interrupt, so the MCU only wakes up 1/16th as often as it would for per-vehicle interrupts.
A short history
A counter uses stored logic states to count input clock events. In a synchronous counter, the flip-flops share a clock; in a ripple counter, one stage clocks the next, so changes propagate through successive stages. The distinction matters when reading a count or decoding it, because outputs do not all change instantaneously.